Is RISC-V the future of computing? I sure hope so. So I tracked down one of the cheapest Linux-capable SBCs that supports this architecture, the Milk-V Duo. For a listed price of $9 (and selling for $5), this little guy offers a RV64 Linux environment complete with busybox, Ethernet, and a wide assortment of IO rivaling some microcontrollers. Today I’m going to steup the board and start learning about RISC-V computing!
Fundamentally, the RISC-V architecture is a document which describes the binary machine lanuage of a 32, 64, or 128 bit processor with integer and optional floating point support, but it’s also symbolic of the shift to open computing for the future, and as a computer engineer I’m excited to learn more about it.
Find information about the Group Buy on my Ko-Fi:
Milk-V Product Page:
Buy the Milk-V Duo on Arace Tech:
Buy the Milk-V Duo on Taobao:
Milk-V Duo Documentation:
Feel free to chat about my upcoming projects on Discord!
Blog post with links:
Test Code / Assembly on my Github:
IPV6-enabled SD Image on my Github:
I reached out to Milk-V to make this video, they sent me the board, breakout, and camera free of charge but were otherwise not involved in this video.
If you want to hear me talk more about the history of computer architecture, here’s a cut clip from this video:
Timestamps:
00:00 – Introduction
00:49 – What Is RISC-V?
01:35 – Unboxing
03:06 – First Boot
05:30 – Writing Code
09:29 – RISC-V Assembly
16:38 – Hardware IO
17:18 – Ethernet
19:39 – Kernel Build
22:04 – USB Host
22:52 – Camera
23:20 – RISC and Me
#riscv #computerarchitecture
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